Inversion balancing compensation

ABSTRACT

System and method for improving displayed image quality of an electronic display that displays a first image frame by applying a first voltage to a display pixel and a second image frame directly before the first image frame by applying a second voltage to the display pixel. A display pipeline is communicatively coupled to the electronic display and receives first image data corresponding with the first image frame, where the image data includes a first grayscale value corresponding with the display pixel. Additionally the display pipeline determines an inversion balancing grayscale offset based at least in part on the first grayscale value when polarity of the first voltage and polarity of the second voltage are the same and determines magnitude of the first voltage by applying the inversion balancing grayscale offset to the first grayscale value to reduce likelihood of a perceivable luminance spike when displaying the first image frame.

CROSS REFERENCE TO RELATED APPLICATIONS

Under 35 U.S.C. § 120, this application is a continuation of U.S. patentapplication Ser. No. 14/986,181 filed Dec. 31, 2015, which is acontinuation-in-part of U.S. patent application Ser. No. 14/725,545filed May 29, 2015, which claims priority to U.S. Provisional PatentApplication No. 62/017,081 filed Jun. 25, 2014, each of which isincorporated by reference herein in its entirety for all purposes.

BACKGROUND

The present disclosure relates generally to an electronic display, andmore particularly, to inversion balancing in an electronic display.

This section is intended to introduce the reader to various aspects ofart that may be related to various aspects of the present techniques,which are described and/or claimed below. This discussion is believed tobe helpful in providing the reader with background information tofacilitate a better understanding of the various aspects of the presentdisclosure. Accordingly, it should be understood that these statementsare to be read in this light, and not as admissions of prior art.

Generally, an electronic display may enable a user to perceive images bysuccessively writing images to a display panel of the electronicdisplay. More specifically, the images may be displayed on theelectronic display by applying a voltage to the pixels in the displaypanel. In some circumstances, the polarity of the voltage applied toeach pixel may be alternated between positive voltage and negativevoltage to reduce the possibility of polarizing the pixel. For example,in a frame inversion technique, positive polarity voltages may beapplied to the pixels on the display panel to display a first image(e.g., frame). Subsequently, negative polarity voltages may be appliedto the pixels on the display panel to display a second image (e.g.,frame).

As used herein, a “refresh rate” is intended to describe the frequencywith which the images are written to the display panel. Accordingly, insome embodiment, adjusting the refresh rate of an electronic device mayadjust the power consumption by the electronic display. For example,when the refresh rate is higher, the power consumption may also behigher. On the other hand, when the refresh rate is lower, the powerconsumption may also be lower. In fact, in some embodiments, the refreshrate may be dynamic even between successively displayed images. Forinstance, continuing with the above example, the first image may bedisplayed with a refresh rate of 60 Hz and the second image may bedisplayed with a refresh rate of 30 Hz. In other words, the negativepolarity voltage may be applied to the display panel for twice as longas the positive polarity voltage. However, since the duration theopposite polarity voltages are applied to the display panel may bedifferent when the refresh rate is variable, polarization may result inthe pixels and reduce image quality.

As such, it would be beneficial to maintain image quality even when therefresh rate is dynamic, for example, by reducing the possibility ofpolarizing the pixels in the display panel.

SUMMARY

A summary of certain embodiments disclosed herein is set forth below. Itshould be understood that these aspects are presented merely to providethe reader with a brief summary of these certain embodiments and thatthese aspects are not intended to limit the scope of this disclosure.Indeed, this disclosure may encompass a variety of aspects that may notbe set forth below.

The present disclosure generally relates to improving quality of imagesdisplayed on an electronic display particularly when refresh rate of theelectronic display is dynamic. More specifically, when the refresh rateis dynamic, the duration each successive image (e.g., frame) isdisplayed may vary. As such, when inversion exclusively alternatesbetween applying positive and negative voltages, polarization may occurin the electronic display pixels and reduce image quality.

Accordingly, when the refresh rate is dynamic, the techniques describedherein may reduce the possibility of polarizing the pixels in theelectronic display by determining the polarity of the voltage applied towrite each image and the duration each image is displayed. In someembodiments, the duration each image is displayed may be based on thenumber of lines included in image data corresponding with each image.For example, a timing controller (TCON) in the electronic display maycount the number of vertical blank (Vblank) lines and active lines inimage data received from an image source. Based on the count value, thetiming controller may then determine whether to apply a positivepolarity voltage or a negative polarity voltage in the next image (e.g.,frame).

More specifically, the timing controller may count up when a positivevoltage is applied to the electronic display pixels and count down witha negative voltage is applied to the electronic display pixels, or viceversa. In some embodiments, the possibility of polarizing the electronicdisplay pixels may be reduced by maintaining the counter value towardszero. Thus, when the count value is a positive number, the timingcontroller may determine that the next image should be written with anegative voltage and, when the count value is a negative number, thetiming controller may determine that the next image should be writtenwith a positive voltage. In other words, the inversion techniques maybalance the duration that opposite polarity voltages are applied to theelectronic display pixels, which may reduce the possibility ofpolarization.

BRIEF DESCRIPTION OF THE DRAWINGS

Various aspects of this disclosure may be better understood upon readingthe following detailed description and upon reference to the drawings inwhich:

FIG. 1 is a block diagram of a computing device used to display images,in accordance with an embodiment;

FIG. 2 is an example of the computing device of FIG. 1, in accordancewith an embodiment;

FIG. 3 is an example of the computing device of FIG. 1, in accordancewith an embodiment;

FIG. 4 is an example of the computing device of FIG. 1, in accordancewith an embodiment;

FIG. 5 is block diagram of a portion of the computing device of FIG. 1used to display images, in accordance with an embodiment;

FIG. 6 is a flow diagram of a process for reducing the possibility ofpolarization, in accordance with an embodiment;

FIG. 7 is a flow diagram of a process for displaying an image (e.g.,frame) based on a counter value, in accordance with an embodiment;

FIG. 8 is a flow diagram of a process for updating the counter value, inaccordance with an embodiment;

FIG. 9 is an example of a counter value in relation to a hypotheticaloperation of an electronic display, in accordance with an embodiment;

FIG. 10 is a flow diagram of a non-linear process for updating thecounter value, in accordance with an embodiment; and

FIG. 11 is an example of a non-linear counter value in relation to ahypothetical operation of an electronic display, in accordance with anembodiment.

DETAILED DESCRIPTION

One or more specific embodiments of the present disclosure will bedescribed below. These described embodiments are only examples of thepresently disclosed techniques. Additionally, in an effort to provide aconcise description of these embodiments, all features of an actualimplementation may not be described in the specification. It should beappreciated that in the development of any such actual implementation,as in any engineering or design project, numerousimplementation-specific decisions must be made to achieve thedevelopers' specific goals, such as compliance with system-related andbusiness-related constraints, which may vary from one implementation toanother. Moreover, it should be appreciated that such a developmenteffort might be complex and time consuming, but may nevertheless be aroutine undertaking of design, fabrication, and manufacture for those ofordinary skill having the benefit of this disclosure.

When introducing elements of various embodiments of the presentdisclosure, the articles “a,” “an,” and “the” are intended to mean thatthere are one or more of the elements. The terms “comprising,”“including,” and “having” are intended to be inclusive and mean thatthere may be additional elements other than the listed elements.Additionally, it should be understood that references to “oneembodiment” or “an embodiment” of the present disclosure are notintended to be interpreted as excluding the existence of additionalembodiments that also incorporate the recited features.

As mentioned above, an electronic display may display images by applyingvoltage to the pixels in a display panel. More specifically, the pixelsmay transmit light based at least in part on the magnitude of thevoltage applied. However, when a direct current (DC) voltage is appliedto the pixel for extended periods of time, the pixels may becomepolarized, which may reduce the displayed image quality. For example,when a positive voltage is applied to a pixel for an extended period oftime, the pixel may begin to be polarized positive. As such, when avoltage is applied to the pixel, the positive polarization may cause thepixel to have a higher voltage than the applied voltage, which causesthe pixel to inaccurately transmit light.

Thus, it may be beneficial to utilize inversion techniques byalternating the polarity of the voltage applied to the display panel toreduce the risk of pixels becoming polarized. For example, in a frameinversion technique, a first image may be written to the display panelby applying a positive voltage and a second image may be written to thedisplay panel by applying a negative voltage. In other words, assumingthat a constant refresh rate is used, applying a positive and a negativevoltage in an alternating manner may enable the opposite voltages tocancel each other out and reduce the risk of polarization.

However, in some embodiments, an electronic display may have thecapability to switch to a dynamic variable refresh rate. Morespecifically, the electronic display may switch from utilizing aconstant refresh rate (e.g., 60 Hz per frame) to a dynamic variablerefresh rate and vice versa, for example by using a control bit. Forexample, when a dynamic variable refresh rate is used, the refresh rateused to display a first image may be different from the refresh rateused to display a second image. In other words, the duration each imageis displayed on the display panel may vary. In such embodiments, evenalternating the polarity of the voltage applied to the display panel ineach successively displayed image may still result in polarization ofthe pixels. For example, in an extreme case, a first image may bedisplayed at 30 Hz by applying a positive voltage, a second image may bedisplayed at 60 Hz by applying a negative voltage, a third image may bedisplayed at 30 Hz by applying a positive voltage, a fourth image may bedisplayed at 60 Hz by applying a negative voltage, and so on. In such acase, the positive voltage will be applied to the display panel fortwice as long as the negative voltage. Thus, over an extended period oftime, the pixels may still become polarized positive.

Accordingly, one embodiment of the present disclosure describes anelectronic display that includes a display panel, which displays imageswith varying refresh rates, and a timing controller. More specifically,the timing controller receives image data from an image source,determines a counter value, and instructs a driver in the electronicdisplay to apply a voltage to the display panel to write an image on thedisplay panel based on the counter value. In some embodiments, thetiming controller may instruct the driver to apply a negative voltagewhen the counter value is positive and a positive voltage when thecounter value is less than or equal to zero or vice versa. Additionally,the timing controller updates the counter value based on the durationthat the image is displayed on the display panel. In some embodiment,the timing controller may increase the counter value when the appliedvoltage is positive and decrease the counter value when the appliedvoltage is negative.

As will be described in more detail below, the counter value may be usedto keep track of the duration positive voltage and negative voltage isapplied to the display panel. As such, the counter value may be used todetermine the polarity of voltage that should be applied to reduce thepossibility of polarization. For example, when a first image isdisplayed at 30 Hz by applying a positive voltage, the counter value mayindicate that a subsequent 60 Hz image should be displayed by applying anegative voltage. Additionally, the counter value may indicate that asecond subsequent 60 Hz image should be displayed by applying a negativevoltage. In other words, the techniques described herein allow forsuccessively displayed images (e.g., frames) to be written using thesame polarity voltage.

To help illustrate, a computing device 10 that utilizes an electronicdisplay 12 to display images is described in FIG. 1. As will bedescribed in more detail below, the computing device 10 may be anysuitable computing device, such as a handheld computing device, a tabletcomputing device, a notebook computer, and the like.

Accordingly, as depicted, the computing device 10 includes the display12, input structures 14, input/output (I/O) ports 16, one or moreprocessor(s) 18, memory 20, nonvolatile storage 22, a network interface24, and a power source 26, and image processing circuitry 27. Thevarious components described in FIG. 1 may include hardware elements(including circuitry), software elements (including computer code storedon a non-transitory computer-readable medium), or a combination of bothhardware and software elements. It should be noted that FIG. 1 is merelyone example of a particular implementation and is intended to illustratethe types of components that may be present in the computing device 10.Additionally, it should be noted that the various depicted componentsmay be combined into fewer components or separated into additionalcomponents. For example, the image processing circuitry 27 (e.g.,graphics processing unit) may be included in the one or more processors18.

As depicted, the processor 18 and/or image processing circuitry 27 areoperably coupled with memory 20 and/or nonvolatile storage device 22.More specifically, the processor 18 and/or image processing circuitry 27may execute instruction stored in memory 20 and/or non-volatile storagedevice 22 to perform operations in the computing device 10, such asgenerating and/or transmitting image data. As such, the processor 18and/or image processing circuitry 27 may include one or more generalpurpose microprocessors, one or more application specific processors(ASICs), one or more field programmable logic arrays (FPGAs), or anycombination thereof. Additionally, memory 20 and/or non volatile storagedevice 22 may be a tangible, non-transitory, computer-readable mediumthat stores instructions executable by and data to be processed by theprocessor 18 and/or image processing circuitry 27. In other words, thememory 20 may include random access memory (RAM) and the non-volatilestorage device 22 may include read only memory (ROM), rewritable flashmemory, hard drives, optical discs, and the like. By way of example, acomputer program product containing the instructions may include anoperating system (e.g., OS X® or iOS by Apple Inc.) or an applicationprogram (e.g., iBooks® by Apple Inc.).

Additionally, as depicted, the processor 18 is operably coupled with thenetwork interface 24 to communicatively couple the computing device 10to a network. For example, the network interface 24 may connect thecomputing device 10 to a personal area network (PAN), such as aBluetooth network, a local area network (LAN), such as an 802.11x Wi-Finetwork, and/or a wide area network (WAN), such as a 4G or LTE cellularnetwork. Furthermore, as depicted, the processor 18 is operably coupledto the power source 26, which provides power to the various componentsin the computing device 10. As such, the power source 26 may includesany suitable source of energy, such as a rechargeable lithium polymer(Li-poly) battery and/or an alternating current (AC) power converter.

As depicted, the processor 18 is also operably coupled with I/O ports16, which may enable the computing device 10 to interface with variousother electronic devices, and input structures 14, which may enable auser to interact with the computing device 10. Accordingly, the inputsstructures 14 may include buttons, keyboards, mice, trackpads, and thelike. Additionally, in some embodiments, the display 12 may includetouch sensitive components. For example, the electronic display 12 maybe a MultiTouch™ display that can detect multiple touches at once.

In addition to enabling user inputs, the display 12 may display images.In some embodiments, the images displayed may be a graphical userinterface (GUI) for an operating system, an application interface, astill image, or a video. As depicted, the display is operably coupled tothe processor 18 and the image processing circuitry 27. Accordingly, theimages displayed by the display 12 may be based on image data receivedfrom the processor 18 and/or the image processing circuitry 27.

As will be described in more detail below, the image data transmitted tothe display 12 may determine the refresh rate with which images based onthe image data are displayed. For example, the processor 18 and/or theimage processing circuitry 27 may communicate the refresh rate to usebased on the number of vertical blank (Vblank) lines include in theimage data. Accordingly, once the image data is received, the display 12may determine the refresh rate to use by determining the number ofvertical blank lines and/or the number of active lines include in theimage data. As will be described in more detail below, the number oflines (e.g., vertical blank and active lines) may directly correspondwith duration an image is displayed because the time it takes for thedisplay 12 to write one line is generally constant. For example, when adisplayed image has a resolution of 2880×1800 and is displayed at 60 Hz,the image data may include 52 vertical blank lines and 1800 activelines. Thus, the duration the image is displayed may be described as1852 lines.

As described above, the computing device 10 may be any suitableelectronic device. To help illustrate, one example of a handheld device10A is described in FIG. 2, which may be a portable phone, a mediaplayer, a personal data organizer, a handheld game platform, or anycombination of such devices. Accordingly, by way of example, thehandheld device 10A may be a model of an iPod® or iPhone® available fromApple Inc. of Cupertino, Calif.

As depicted, the handheld device 10A includes an enclosure 28, which mayprotect interior components from physical damage and to shield them fromelectromagnetic interference. The enclosure 28 may surround the display12, which, in the depicted embodiment, displays a graphical userinterface (GUI) 30 having an array of icons 32. By way of example, whenan icon 32 is selected either by an input structure 14 or a touchsensing component of the display 12, an application program, such asiBooks® made by Apple Inc., may launch.

Additionally, as depicted, input structure 14 may open through theenclosure 28. As described above, the input structures 14 may enable auser to interact with the handheld device 10A. For example, the inputstructures 14 may activate or deactivate the handheld device 10A,navigate a user interface to a home screen, navigate a user interface toa user-configurable application screen, activate a voice-recognitionfeature, provide volume control, and toggle between vibrate and ringmodes. Furthermore, as depicted, the I/O ports 16 open through theenclosure 28. In some embodiments, the I/O ports 16 may include, forexample, an audio jack and/or a Lightning® port from Apple Inc. toconnect to external devices.

To further illustrate a suitable computing device 10, a tablet device10B is described in FIG. 3. By way of example, the tablet device 10B maybe a model of an iPad® available from Apple Inc. Additionally, in otherembodiments, the computing device 10 may take the form of a computer 10Cas described in FIG. 4. By way of example, the computer 10C may be amodel of a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, orMac Pro® available from Apple Inc. As depicted, the computer 10C alsoincludes a display 12, input structures 14, I/O ports 16, and a housing28.

As described above, the display 12 may display images based on imagedata received from the processor 18 and/or the image processingcircuitry 27. More specifically, the image data may be processed by anycombination of the processor 18, the image processing circuitry 27, andthe display 12 itself. To help illustrate, a portion 34 of the computingdevice 10 that processes and communicates image data is described inFIG. 5.

As depicted, the portion 34 of the computing device 10 includes an imagesource 36, a timing controller (TCON) 38, and a display driver 40. Morespecifically, the source 36 may generate image data and transmit theimage data to the timing controller 38. Accordingly, in someembodiments, the source 36 may be the processor 18 and/or the imageprocessing circuitry 27. Additionally, in some embodiments, the timingcontroller 38 and the display driver 40 may be included in theelectronic display 12.

As described above, the display 12 may display an image based at leastin part on the received image data. As such, the timing controller 38may analyze the received image data and instruct the driver 40 to writean image to the pixels by applying a voltage to the display panel of theelectronic display 12. To facilitate processing/analyzing the image dataand/or performing other operations, the timing controller 38 may includea processor 42 and memory 44. In some embodiments, the timing controllerprocessor 42 may be included in the processor 18 and/or the imageprocessing circuitry 27. In other embodiments, the timing controllerprocessor 42 may be a separate processing module. Additionally, in someembodiments, the timing controller memory 44 may be included in memory20, storage device 22, or another tangible, non-transitory, computerreadable medium. In other embodiments, the timing controller memory 44may be a separate tangible, non-transitory, computer readable mediumthat stores instructions executable by the timing controller processor42.

More specifically, the timing controller 38 may analyze the receivedimage data to determine the magnitude of voltage to apply to each pixelto achieve the desired image and instruct the driver 40 accordingly.Additionally, the timing controller 38 may analyze the received imagedata to determine the refresh rate with which to display an imagedescribed by the image data and instruct the driver 40 accordingly. Morespecifically, the timing controller 38 may determine the refresh ratebased at least in part on the number of vertical blank (Vblank) linesand/or active lines included in the image data.

For example, when the display 12 displays images with a resolution of2880×1800, the timing controller 38 may instruct the driver 40 todisplay a first image at 60 Hz when the timing controller 38 determinesthat corresponding image data includes 52 vertical blank lines and 1800active lines. Additionally, the timing controller 38 may instruct thedriver 40 to display a second image at 30 Hz when the timing controller38 determines that corresponding image data includes 1904 vertical blanklines and 1800 active lines.

As described above, a line (e.g., active or vertical blank) is used todescribe the amount of time to write an image to one row of pixels. Morespecifically, since each row of pixels in the display panel issuccessively written, the duration an image is displayed includes thenumber of active lines in corresponding image data. Additionally, when avertical blank line in the corresponding image data is received, thedisplayed image may continue to be displayed. As such, the totalduration an image is displayed may be described as the sum of the numberof vertical blank lines and the number of active lines in thecorresponding image data. To help illustrate, continuing with the aboveexample, the duration the first image is displayed may be 1852 lines andthe duration the second image is displayed may be 3704 lines.

More specifically, as described above, the duration positive andnegative voltages are applied to the display panel may be used todetermine polarity of the voltage to use for writing the next image.Accordingly, the timing controller 38 may utilize a counter 46 to keeptrack. For example, in some embodiments, the counter 46 may count upwhen a positive voltage is applied and count down when a negativevoltage applied. Additionally, the timing controller 38 may instruct thedriver 40 to apply a negative voltage to the display panel when thecounter value is positive and to apply a positive voltage to the displaywhen the counter value is negative. In other words, the timingcontroller 38 may maintain the counter value towards zero. Thus, in someembodiments, the counter 46 may be sized such that the maximum positiveand negative value is equal to the total number of lines in an image(e.g., frame). For example, the counter 46 may be 24 bits signed toaccommodate refresh rates below 0.2 Hz.

As such, the possibility of polarizing the pixels may be reduced byapplying positive voltages and negative voltages for approximately equalamounts of time. Thus, the timing controller 38 may determine the numberof vertical blank lines and/or active lines to determine polarity of thevoltage to apply to the display panel to write the next successive imagewhen the image source 36 is in an active mode and communicate thedetermined polarity to the driver 40, for example, using the CommonDevice Interface (CDI). However, in some embodiments, to furtherconserve power, the source 36 may utilize Advanced Link Power Management(ALPM). More specifically, the source 36 may enter a sleep mode when thesource 36 determines that the next subsequent image to be displayed isthe same as the previously displayed image.

However, when the source 36 stops transmitting image data, the voltageapplied to display the previous image continues to be held in thepixels. In other words, the voltage continues to be applied to thepixels even when new images are not being written to the display panel.As such, the timing controller 38 may continue to account for theduration the voltage is being held by the pixels in the display panelusing a timer 47. More specifically, the timer 47 may continue to keeptrack of the duration that the voltage is held. Thus, since the timeused to write a line is generally constant, the timing controller 38 maycontinue keeping track of duration voltage is held by dividing the timervalue by the time generally used to write a line in an image. In someembodiments, the time used to write a line may be predetermined andstored in the timing controller memory 44. Thus, as will be described inmore detail below, the counter 46 may continue counting up while apositive voltage is being held in the display panel and continuecounting down while a negative voltage is being held in the displaypanel based on the timer value.

Accordingly, even when the source 36 enters a sleep mode and ceasestransmitting image data, the counter 46 may continue keeping track ofduration positive voltages and negative voltages have been applied tothe display panel. Thus, as described above, the timing controller 38may determine the polarity of voltage to apply to write the nextsubsequent image based on the counter value and instruct the driver 40accordingly.

To help illustrate, one embodiment of a process 48 for displaying imagesis described in FIG. 6. Generally, the process 48 includes determining aprevious counter value (process block 50), displaying an image (processblock 52), determining duration the image is displayed (process block54), and updating the counter value (process block 56). In someembodiments, the process 48 may be implemented using instructions storedin the timing controller memory 44 and/or another suitable tangiblenon-transitory computer-readable medium and executable by the timingcontroller processor 42 and/or another suitable processing circuitry.

Accordingly, the timing controller 38 may determine the previous countervalue by polling the counter 46 (process block 50). In some embodiments,the timing controller 38 may poll the counter 46 whenever image data isreceived from the source 36. As described above, the previous countervalue may then be used to determine polarity of voltage to use to writean image to the display panel.

Thus, the timing controller 38 may instruct the driver 40 to write animage to the pixels of the display panel based on the received imagedata and the previous counter value (process block 52). Morespecifically, the timing controller 38 may determine magnitude ofvoltage to apply to the pixels in the display panel based on the activelines included in the received image data and the polarity of thevoltage to apply based on the previous counter value. As describedabove, the timing controller 38 may determine the magnitude of thevoltage to apply to control brightness of each pixel.

Additionally, the timing controller 38 may determine the polarity of thevoltage to use for applying the determined voltage magnitude based onthe previous counter value. To help illustrate, one embodiment of aprocess 58 for determining polarity of the voltage to apply is describedin FIG. 7. Generally, the process 58 includes determining whether theprevious counter value is greater than zero (decision block 60) and whenthe counter value is greater than zero, displaying an image with anegative polarity (process block 62) and decreasing the counter value(process block 64). On the other hand, when the counter value is notgreater than zero (e.g., less than or equal to zero), the process 58includes displaying an image with a positive polarity (process block 66)and increasing the counter value (process block 68). In someembodiments, process 58 may be implemented using instructions stored inthe timing controller memory 44 and/or another suitable tangiblenon-transitory computer-readable medium and executable by the timingcontroller processor 42 and/or another suitable processing circuitry.

Accordingly, once the previous counter value is received, the timingcontroller 38 may determine whether the previous counter value isgreater than zero (decision block 60). When the previous counter valueis greater than zero, the timing controller 38 may instruct the driver40 to apply a negative polarity voltage at the determined magnitude(process block 62). On the other hand, when the previous counter valueis not greater than zero, the timing controller 38 may instruct thedriver 40 to apply a positive polarity voltage at the determinedmagnitude (process block 66).

Additionally, returning to FIG. 6, once the image is displayed, thetiming controller 38 may determine the duration to display the imagebased on the received image data (process block 54). More specifically,when active lines are received, a corresponding image is written to thepixels in the display panel. Additionally, when vertical blank lines arereceived, the image is continued to be displayed. In other words, thevoltage at the determined magnitude and polarity may be applied for aduration equal to the number of active lines and vertical blank lines inthe image data.

As such, the counter value may be updated to keep track of the durationrespective positive and negative polarity voltages are applied byincreasing or decreasing the counter value (process block 56). Morespecifically, returning to FIG. 7, the counter 46 may be increased whena positive polarity voltage is applied (process block 68). On the otherhand, the counter 46 may be decreased when a negative polarity voltageis applied (process block 64). Thus, the amount the counter value may beincreased or decreased (e.g., updated or incremented) by the number oflines (e.g., vertical blank and/or active) included in the image data.

To help illustrate, one embodiment of a process 70 for determining theamount to increase or decrease the counter 46 is described in FIG. 8.Generally, the process 70 includes determining the number of activelines included in the image data (process block 72), determining thenumber of vertical blank (Vblank) lines included in the image data(process block 74), and determining whether new image data is received(decision block 76). When new image data is received, the number ofvertical blank lines and active lines may again be determined based onthe new image data. On the other hand, when new image data is notreceived, the process 70 includes starting a timer (process block 78),stopping the timer when new image data is received (process block 80),and determining the number of lines the timer was running for (processblock 82). In some embodiments, process 70 may be implemented usinginstructions stored in the timing controller memory 44 and/or anothersuitable tangible non-transitory computer-readable medium and executableby the timing controller processor 42 and/or another suitable processingcircuitry.

Accordingly, the timing controller 38 may determine the number of activelines in the received image data (process block 72). Generally, theimage data includes one active line for each row of the display 12. Inother words, the number of active rows is generally equivalent to theheight of the resolution of the displayed image. For example, when thedisplayed image has a resolution of 2880×1800, the image data mayinclude 1800 active lines. Accordingly, in some embodiments, the timingcontroller 38 may count the number of active lines included in the imagedata. Additionally or alternatively, the number of active lines may bepredetermined and stored in the timing controller memory 44.

Additionally, the timing controller 38 may determine the number ofvertical blank lines included in the received image data (process block74). In some embodiments, the vertical blank lines may include avertical front porch, a vertical sync pulse, and a vertical back porch.More specifically, the vertical front porch may include a number ofblank (e.g., black) lines that are transmitted before the vertical syncpulse, which may also last for several lines. After the vertical syncpulse, the vertical back porch may transmitted, which also includes anumber of blank (e.g., black) lines. Thus, the timing controller 38 maydetermine the number of vertical blank lines by counting the number ofblank lines and the number of lines in the vertical sync pulse in thereceived image data.

Thus, the timing controller 38 may determine the duration an imagecorresponding with received image data is displayed by adding togetherthe number of vertical blank lines and the number of active linesreceived from the source 36. However, as described above, powerconsumption may be improved by placing the source 36 into sleep mode andceasing transmission of image data, for example, when a subsequent imageis the same as a previous image. More specifically, when the source 36ceases transmission of the image data, the display 12 continues to holdthe voltage in the pixels of the display panel. Thus, the duration thevoltage is held in the pixels should also be accounted for.

As such, when new image data is not received, the timing controller 38starts the timer 47 (process block 78). The timing controller 38 stopsthe timer 47 when new image data is received (process block 80), whichindicates that the source 36 is no longer asleep. Thus, the timer 47 mayindicate the amount of time the voltage was held in the pixels while thesource 36 was asleep.

Since the duration to write a line is generally constant, the equivalentnumber of lines that the voltage is held in the pixels may be determined(process block 82). More specifically, the duration measured by thetimer 47 may be divided by the time used to write one row (e.g., line)of an image. For example, if it takes one millisecond to write a row ofan image and the timer 47 determines that the voltage was held for fivemilliseconds, the timing controller 38 may determine that voltage washeld by the pixels for an equivalent of five lines. Additionally oralternatively, the counter 46 may simply count up or count down eachtime duration for writing one line passes.

Based on the above described techniques, the duration positive andnegative voltages are applied/held may be balanced to reduce possibilityof polarizing the pixels. To help illustrate the techniques, ahypothetical display operation 84 is described in FIG. 9. Morespecifically, the hypothetical display operation 84 describes image datareceived by the display 12 between t0 and t9.

As depicted, first image data 86 begins to be received at t0. To displaya first image corresponding with the first image data 86 the timingcontroller 38 may analyze the first image data 86 to determine themagnitude of the voltage to apply to write the first image. Morespecifically, the timing controller 38 may determine the magnitude ofthe voltage to apply based on the active lines included in the firstimage data 86. Additionally, in response to receiving the first imagedata 86, the timing controller 38 may poll the counter 46 and determinethat the previous counter value is zero. Thus, the timing controller 38may determine that a positive polarity voltage should be applied to thepixels in the display panel to write the first image.

Furthermore, the timing controller 38 may determine the refresh ratebased on the total number of lines (e.g., vertical blank and active)included in the image data. For example, in the depicted example, thetiming controller 38 may determine that the first image should bedisplayed at 60 Hz because the first image data 86 includes 52 verticalblank lines and 1800 active lines (e.g., 1852 total lines). Accordingly,the timing controller 38 may instruct the driver 40 to use a positivevoltage at the determined magnitude at 60 Hz to display the first image.Additionally, since a positive voltage is applied, the counter 46 willcount up 1852 lines. Thus, at t1, the counter value may be 1852.

Subsequently, as depicted, second image data 88 begins to be received att1. Similar to displaying the first image, to display a second imagecorresponding with the second image data 88, the timing controller 38may determine the magnitude of the voltage to apply based on the activelines included in the second image data 88. Additionally, in response toreceiving the second image data 88, the timing controller 38 may pollthe counter 46 and determine that the previous counter value is 1852.Thus, the timing controller 38 may determine that a negative polarityvoltage should be applied to the pixels in the display panel to writethe second image.

Furthermore, the timing controller 38 may determine that the secondimage should be displayed at 30 Hz because the second image data 86includes 1904 vertical blank lines and 1800 active lines (e.g., 3704total lines). Accordingly, the timing controller 38 may instruct thedriver 40 to use a negative voltage at the determined magnitude at 30 Hzto display the second image. Additionally, since a negative voltage isapplied, the counter 46 will count down 3704 lines. Thus, at t2, thecounter value may be −1852.

Then, as depicted, third image data 90 begins to be received at t2.Similar to displaying the first and second images, to display a thirdimage corresponding with the third image data 90, the timing controller38 may determine the magnitude of the voltage to apply based on theactive lines included in the third image data 90. Additionally, inresponse to receiving the third image data 90, the timing controller 38may poll the counter 46 and determine that the previous counter value is−1852. Thus, the timing controller 38 may determine that a positivepolarity voltage should be applied to the pixels in the display panel towrite the third image.

Furthermore, the timing controller 38 may determine that the third imageshould be displayed at 60 Hz because the third image data 90 includes 52vertical blank lines and 1800 active lines (e.g., 1852 total lines).Accordingly, the timing controller 38 may instruct the driver 40 to usea positive voltage at the determined magnitude at 60 Hz to display thethird image. Additionally, since a positive voltage is applied, thecounter 46 will count up 1852 lines. Thus, at t3, the counter value maybe zero.

As depicted, fourth image data 92 begins to be received at t3. Similarto displaying the first through third images, to display a fourth imagecorresponding with the fourth image data 92, the timing controller 38may determine the magnitude of the voltage to apply based on the activelines included in the fourth image data 92. Additionally, in response toreceiving the fourth image data 92, the timing controller 38 may pollthe counter 46 and determine that the previous counter value is zero.Thus, the timing controller 38 may determine that a positive polarityvoltage should again be applied to the pixels in the display panel towrite the fourth image. As such, two positive polarity voltages areapplied to write successive images. In other words, the voltages appliedusing the present techniques do not necessarily alternate in successiveimages.

Furthermore, the timing controller may determine that the fourth imageshould be displayed at 45 Hz because the fourth image data 86 includes978 vertical blank lines and 1800 active lines (e.g., 2778 total lines).In other words, the refresh rate with which images may be displayed isnot limited to 30 Hz and 60 Hz and can be any refresh rate suitable forthe display 12. In fact, in some embodiments, the refresh rate may beanywhere from 0.2-75 Hz. The timing controller 38 may then instruct thedriver 40 to use a positive voltage at the determined magnitude at 45 Hzto display the fourth image. Additionally, since a positive voltage isapplied, the counter 46 will count up 2778 lines. Thus, at t4, thecounter value may be 2778.

Then, as depicted, fifth image data 94 begins to be received at t4.Similar to displaying the first through fourth images, to display afifth image corresponding with the fifth image data 94, the timingcontroller 38 may determine the magnitude of the voltage to apply basedon the active lines included in the fifth image data 94. Additionally,in response to receiving the fifth image data 94, the timing controller38 may poll the counter 46 and determine that the previous counter valueis 2778. Thus, the timing controller 38 may determine that a negativepolarity voltage should be applied to the pixels in the display panel towrite the fifth image.

Furthermore, the timing controller 38 may determine that the fifth imageshould be displayed at 60 Hz because the fifth image data 94 includes 52vertical blank lines and 1800 active lines (e.g., 1852 total lines).Accordingly, the timing controller 38 may instruct the driver 40 to usea negative voltage at the determined magnitude at 60 Hz to display thefifth image. Additionally, since a negative voltage is applied, thecounter 46 will count down 1852 lines. Thus, at t5, the counter valuemay be 926.

At t5, the source 36 may go into a sleep mode and cease transmittingimage data. As such, the display 12 may continue to hold the negativevoltage used to display the fifth image in the display panel pixels.Thus, in response to detecting that new image data is not received, thetiming controller 38 may start the timer 47 at t5. Subsequently, at t6,sixth image data may be received. Thus, in response to detecting that anew image has been received, the timing controller 38 may stop the timer47 at t6.

As described above, using the timer value, the timing controller 38 mayupdate the counter 46. More specifically, the timing controller 38 mayupdate the counter value by dividing the timer value by time generallyused to write a line of an image. For example, assuming that itgenerally takes 1 ms to write one line of an image and the timer valueat t6 is 2222, the timing controller 38 may determine that between t5and t6 a negative voltage is held in the display panel pixels for 2222lines. Thus, the counter value at t6 may be −1296. In some embodiments,the timing controller 38 may update the counter value while the timer 47measures the duration. In other words, the counter 46 may count downevery 1 ms between t5 and t6. Additionally or alternatively, the timingcontroller 38 may update the counter value when new image data isreceived (e.g., at t6).

As depicted, sixth image data begins to be received at t6. Similar todisplaying the first through fifth images, to display a sixth imagecorresponding with the sixth image data 96, the timing controller 38 maydetermine the magnitude of the voltage to apply based on the activelines included in the sixth image data 96. Furthermore, in response toreceiving the sixth image data 96, the timing controller 38 may poll thecounter 46 and determine that the previous counter value is −1296. Thus,the timing controller 38 may determine that a positive polarity voltageshould be applied to the pixels in the display panel to write the sixthimage.

Furthermore, the timing controller 38 may determine that the sixth imageshould be displayed at 30 Hz because the sixth image data 96 includes1904 vertical blank lines and 1800 active lines (e.g., 3704 totallines). Accordingly, the timing controller 38 may instruct the driver 40to use a positive voltage at the determined magnitude at 30 Hz todisplay the sixth image. Additionally, since a positive voltage isapplied, the counter 46 will count up 3704 lines. Thus, at t7, thecounter value may be 2408.

Subsequently, as depicted, seventh image data 98 begins to be receivedat t7. Similar to displaying the first through sixth images, to displaya seventh image corresponding with the seventh image data 98, the timingcontroller 38 may determine the magnitude of the voltage to apply basedon the active lines included in the seventh image data 98. Furthermore,in response to receiving the seventh image data 98, the timingcontroller 38 may poll the counter 46 and determine that the previouscounter value is 2408. Thus, the timing controller 38 may determine thata negative polarity voltage should be applied to the pixels in thedisplay panel to write the seventh image.

Furthermore, the timing controller 38 may determine that the seventhimage should be displayed at 35 Hz because the seventh image data 98includes 1375 vertical blank lines and 1800 active lines (e.g., 3175total lines). Accordingly, the timing controller 38 may instruct thedriver 40 to use a negative voltage at the determined magnitude at 35 Hzto display the seventh image. Additionally, since a negative voltage isapplied, the counter 46 will count down 3175 lines. Thus, at t8, thecounter value may be −767.

Then, as depicted, eighth image data 100 begins to be received at t8.Similar to displaying the first through seventh images, to display aneighth image corresponding with the eighth image data 100, the timingcontroller 38 may determine the magnitude of the voltage to apply basedon the active lines included in the eighth image data 100. Furthermore,in response to receiving the eighth image data 100, the timingcontroller 38 may poll the counter 46 and determine that the previouscounter value is −767. Thus, the timing controller 38 may determine thata positive polarity voltage should be applied to the pixels in thedisplay panel to write the eighth image.

Furthermore, the timing controller 38 may determine that the eighthimage should be displayed at 60 Hz because the eighth image data 100includes 52 vertical blank lines and 1800 active lines (e.g., 1852 totallines). Accordingly, the timing controller 38 may instruct the driver 40to use a positive voltage at the determined magnitude at 60 Hz todisplay the eighth image. Additionally, since a positive voltage isapplied, the counter 46 will count down 1852 lines. Thus, at t9, thecounter value may be 1085.

Based on the above hypothetical operation 84, the duration that positivevoltages and negative voltages are applied/held may be balanced suchthat the possibility of polarizing pixels in the display panel may bereduced. More specifically, the above example assumes a linearrelationship between duration a voltage is applied and the possibilityof polarization. In other words, a positive voltage applied for one lineshould exactly cancel out a negative voltage applied for one line.However, in other embodiments, the relationship may be non-linear. Toimplement a non-linear embodiment, the amount the counter 46 counts upor down may be adjusted. For example, the longer a voltage isapplied/held the less the counter 46 may count up or down. In otherwords, a non-linear counter may be used.

To help illustrate, one embodiment of a process 102 for using anon-linear counter is described in FIG. 10. Generally, the process 102includes increasing/decreasing the counter value (process block 104),determining whether the counter value has reached a duration threshold(decision block 106), and, when the duration threshold has not beenreached, continuing the increase/decrease the counter (arrow 108). Onthe other hand, when the duration threshold is reached, the process 102includes changing the counter divider (process block 110) and returningto increasing/decreasing the counter (arrow 112). In some embodiments,process 102 may be implemented using instructions stored in the timingcontroller memory 44 and/or another suitable tangible non-transitorycomputer-readable medium and executable by the timing controllerprocessor 42 and/or another suitable processing circuitry.

As in the linear embodiments described above, the timing controller 38may update (e.g., increase or decrease) the counter value based on theduration an image is displayed (process block 104). However, once thetiming controller 38 determines that a duration threshold has beenreached (decision block 106), a counter divider value may be applied(process block 110). More specifically, in some embodiments, a counterdivider may be applied so that the counter value adjusts at smallerincrements. For example, a counter divider value of two may be appliedonce a duration threshold is reached. In such an embodiment, the counter46 may be adjusted one unit for every two lines.

To help illustrate, an example of a duration threshold versus counterdivider relationship is described below.

TABLE 1 Duration threshold vs. Counter Divider Duration Counterthreshold Divider 1852 2 3704 3 5556 4 7408 5 9260 6In the described example, the duration thresholds and the counterdividers are set in a monotonically increasing fashion. However, inother embodiments, the duration threshold and the counter dividers maybe set in any suitable manner. Furthermore, in other embodiments,additionally duration thresholds and counter dividers may be used.

To help illustrate the use of the duration threshold versus counterdivider relationship, the relationship is described with regard to thehypothetical display operation 114 described in FIG. 11. As depicted,first image data 116 begins to be received at t0. In response toreceiving the first image data 116, the timing controller 38 may pollthe counter 46 and determine that the previous counter value is zero.Accordingly, the timing controller 38 may determine that a positivepolarity voltage should be applied to the pixels in the display panel towrite a first image corresponding with the first image 116. Thus, thecounter 46 may begin to count up based on the number of lines includedin the first image data 116, which includes 52 vertical blank lines and1800 active lines (e.g., 1852 total lines). Since the durationthresholds have not been reached, the counter value may increase oneunit per line for the duration the first image is displayed. Thus, thecounter value at t1 may be 1852.

Then, as depicted, second image data 118 begins to be received at t1. Inresponse to receiving the second image data, the timing controller 38may poll the counter 46 and determine that the previous counter value is1852. Accordingly, the timing controller 38 may determine that anegative polarity voltage should be applied to the pixels in the displaypanel to write the second image. Thus, the counter 46 may begin to countdown based on the number of lines included in the first image data 116,which includes 9312 vertical blank lines and 1800 active lines (e.g.,11,112 total lines).

Based on the duration threshold versus counter divider relationshipdescribed above, the duration thresholds may be reached. Morespecifically, as depicted, the counter 46 may count down one unit perline until the first duration threshold (e.g., 1852) is reached. Thus,at t2, the duration the second image has been displayed is 1852 linesand the counter value is zero.

At t2, since the first duration threshold has been reached, the timingcontroller 38 may apply the corresponding counter divider, which asdescribed above is two. As such, the counter 46 may count down one unitevery two lines until the second duration threshold (e.g., 3704) isreached. Thus, at t3, the duration the second image has been displayedis 3704 lines and the counter value is −926.

At t3, since the second duration threshold has been reached, the timingcontroller 38 may again apply the corresponding counter divider, whichas described above is three. As such, the counter 46 may count down oneunit every three lines until the third duration threshold (e.g., 5556)is reached. Thus, at t4, the duration the second image has beendisplayed is 5556 lines and the counter value is −1543.

At t4, since the third duration threshold has been reached, the timingcontroller 38 may again apply the corresponding counter divider, whichas described above is four. As such, the counter 46 may count down oneunit every four lines until the fourth duration threshold (e.g., 7408)is reached. Thus, at t5, the duration the second image has beendisplayed is 7408 lines and the counter value is −2006.

At t5, since the fourth duration threshold is reached, the timingcontroller 38 may again apply the corresponding counter divider, whichas described above is five. As such, the counter 46 may count down oneunit every five lines until the fifth duration threshold (e.g., 9260) isreached. Thus, at t6, the duration the second image has been displayedis 9260 lines and the counter value is −2376.

At t6, since the fifth duration threshold is reached, the timingcontroller 38 may again apply the corresponding counter divider, whichas described above is six. As such, the counter 46 may count down oneunit every six lines. Thus, at t7, the counter value may be −2684.

Subsequently, as depicted, third image data 120 begins to be received att7. In response to receiving the third image data 120, the timingcontroller 38 may poll the counter 46 and determine that the previouscounter value is −2684. Accordingly, the timing controller 38 maydetermine that a positive polarity voltage should be applied to thepixels in the display panel to write a third image corresponding withthe third image data 120. Thus, the counter 46 may begin to count upbased on the number of lines included in the third image data 120, whichincludes 52 vertical blank lines and 1800 active lines (e.g., 1852 totallines). Since the duration thresholds have not been reached, the countervalue may increase one unit per line for the duration the third image isdisplayed. Thus, the counter value at t8 may be −832.

Accordingly, the technical effects of the present disclosure includeimproving inversion techniques used by an electronic displayparticularly when the electronic display uses a dynamic variable refreshrate. More specifically, the likelihood of polarizing pixels in theelectronic display may be reduced by using a counter. In someembodiments, the counter may keep track of duration that positivevoltages are applied to the pixels and the duration that negativevoltages are applied to the pixels. As such, the duration each polarityis applied may offset one another, which reduces the possibility of onebeing applied for substantially longer durations and polarizing thepixels.

The specific embodiments described above have been shown by way ofexample, and it should be understood that these embodiments may besusceptible to various modifications and alternative forms. It should befurther understood that the claims are not intended to be limited to theparticular forms disclosed, but rather to cover all modifications,equivalents, and alternatives falling within the spirit and scope ofthis disclosure.

What is claimed is:
 1. A computing device comprising: a pixel configuredto facilitate displaying images with varying refresh rates on a displaypanel based at least in part on voltage signals applied to the pixel; adriver electrically coupled to the pixel, wherein the driver isconfigured to apply a first voltage signal to the pixel based at leastin part on first image data to facilitate displaying a first image onthe display panel; and processing circuitry communicatively coupled tothe driver, wherein the processing circuitry is configured to: determinea first value indicative of pixel polarization that occurs in the pixeldue to display of the first image based at least in part on a firstdisplay duration of the first image and a non-linear relationshipbetween pixel polarization and display duration; determine a firstvoltage polarity based at least in part on the first value; and instructthe driver to write a second image to the display panel directly afterthe first image by applying a second voltage signal with the firstvoltage polarity to the pixel to facilitate reducing the pixelpolarization during display of the second image.
 2. The computing deviceof claim 1, wherein, to determine the first voltage polarity, theprocessing circuitry is configured to: determine that the first voltagepolarity is a positive voltage polarity when the first value isindicative of the pixel being negatively polarized due to display of thefirst image; and determine that the first voltage polarity is a negativevoltage polarity when the first value is indicative of the pixel beingpositively polarized due to display of the first image.
 3. The computingdevice of claim 1, comprising a counter communicatively coupled to theprocessing circuitry, wherein the counter is configured to: increment acounter value during display of the first image when the first voltagesignal uses the first voltage polarity to write the pixel; decrement thecounter value during display of the first image when the first voltagesignal uses a second voltage polarity opposite the first voltagepolarity to write the pixel; and indicate the first value as the countervalue between display of the first image and display of the secondimage.
 4. The computing device of claim 1, wherein the processingcircuitry is configured to: determine a second value indicative of thepixel polarization that occurs in the pixel due to display of the secondimage based at least in part on a second display duration of the secondimage and the non-linear relationship between pixel polarization anddisplay duration; determine a second voltage polarity based at least inpart on the second value; and instruct the driver to write a third imageto the display panel after the second image by applying a third voltagesignal with the second voltage polarity to the pixel to facilitatereducing the pixel polarization during display of the third image. 5.The computing device of claim 4, comprising a counter communicativelycoupled to the processing circuitry, wherein the counter is configuredto: adjust a counter value at a first rate during display of the firstimage based at least in part on duration the first display duration ofthe first image is less than a duration threshold; adjust the countervalue at a second rate different from the first rate during display ofthe first image based at least in part on duration the first displayduration of the first image is not less than the duration threshold tofacilitate describing the non-linear relationship between pixelpolarization and display duration; indicate the first value as thecounter value between display of the first image and display of thesecond image; adjust the counter value from the first value at the firstrate during display of the second image based at least in part onduration the second display duration of the second image is less thanthe duration threshold; adjust the counter value at the second rateduring display of the second image based at least in part on durationthe second display duration of the second image is not less than theduration threshold to facilitate describing the non-linear relationshipbetween pixel polarization and display duration; and indicate the secondvalue as the counter value between display of the second image anddisplay of the third image.
 6. The computing device of claim 4,comprising: an electronic display, wherein the electronic displaycomprises the pixel, the driver, and the processing circuitry; and animage source communicatively coupled to the electronic display, wherein:the image source is configured to cease output of image data to theelectronic display while operating in a sleep mode; and the processingcircuitry is configured to determine the second value indicative of thepixel polarization that occurs in the pixel based at least in part onduration the image source operates in the sleep mode between display ofthe second image and display of the third image.
 7. The computing deviceof claim 1, wherein the driver is configured to apply the second voltagesignal to the pixel based at least in part on second image data tofacilitate displaying the second image on the display panel.
 8. Thecomputing device of claim 1, wherein the computing device comprises aportable phone, a media player, a personal data organizer, a handheldgame platform, a tablet device, a computer, or any combination thereof.9. A method for operating an electronic display, comprising: receiving,using the electronic display, first image data that indicates targetluminance of a pixel in a first image to be displayed on the electronicdisplay from an image source communicatively coupled to the electronicdisplay; determining, using the electronic display, a first voltagemagnitude to be applied to the pixel to facilitate display of the firstimage based at least in part on the first image data; determining, usingthe electronic display, pixel polarization expected to be present in thepixel directly before display of the first image based at least in parton duration since a previous image was written to the pixel and anon-linear relationship between pixel polarization and duration;determining, using the electronic display, a first voltage polarityexpected to facilitate reducing the pixel polarization present in thepixel directly before display of the first image when applied to thepixel; and displaying, using the electronic display, the first image,wherein displaying the first image comprises applying a first voltagesignal with the first voltage magnitude and the first voltage polarityto the pixel.
 10. The method of claim 9, comprising: displaying, usingthe electronic display, the previous image based at least in part onprevious image data received from the image source; determining, usingthe electronic display, whether the image source switches to a sleepmode between display of the previous image and display of the firstimage based at least in part on duration between receipt of the previousimage data and receipt of the first image data; and determining theduration since the previous image was written based on a sum of a sleepduration of the image source and a display duration of the previousimage when the image source switches to the sleep mode between displayof the previous image and display of the first image.
 11. The method ofclaim 10, comprising: determining, using the electronic display, thesleep duration of the image source when the image source switches to thesleep mode between display of the previous image and display of thefirst image, wherein determining the sleep duration comprises: startinga timer after display of the previous image; and stopping the timer uponreceipt of the first image data; and determining, using the electronicdisplay, the display duration of the previous image by adjusting acounter value based at least in part on number of active lines andnumber of blank lines included in the previous image data.
 12. Themethod of claim 10, wherein determining the pixel polarization expectedto be present in the pixel directly before display of the first imagewhen the image source switches to the sleep mode between display of theprevious image and display of the first image comprises: adjusting acounter value at a first rate during display of the previous image basedat least in part on duration the display duration of the previous imageis less than a first duration threshold; adjusting the counter value ata second rate different from the first rate during display of theprevious image based at least in part on duration the display durationof the previous image is not less than the first duration threshold tofacilitate describing the non-linear relationship between pixelpolarization and duration; adjusting the counter value at a third ratewhile the image source is in the sleep mode based at least in part onduration the sleep duration of the image source is less than a secondduration threshold; adjusting the counter value at a fourth ratedifferent from the third rate while the image source is in the sleepmode based at least in part on duration the sleep duration of the imagesource is not less than the second duration threshold; and determiningthe pixel polarization expected to be present in the pixel directlybefore display of the first image based at least in part on the countervalue directly before display of the first image.
 13. The method ofclaim 9, comprising: receiving, using the electronic display, secondimage data that indicates target luminance of the pixel in a secondimage to be displayed on the electronic display directly after the firstimage from the image source communicatively coupled to the electronicdisplay; determining, using the electronic display, a second voltagemagnitude to be applied to the pixel to facilitate display of the secondimage based at least in part on the second image data; determining,using the electronic display, the pixel polarization expected to bepresent in the pixel directly before display of the second image basedat least in part on a first display duration of the first image and thenon-linear relationship between pixel polarization and duration;determining, using the electronic display, a second voltage polarityexpected to facilitate reducing the pixel polarization present in thepixel directly before display of the second image when applied to thepixel; and displaying, using the electronic display, the second imagedirectly after the first image, wherein displaying the second imagecomprises applying a second voltage signal with the second voltagemagnitude and the second voltage polarity to the pixel.
 14. The methodof claim 13, wherein determining the pixel polarization expected to bepresent in the pixel directly before display of the second imagecomprises: adjusting a counter value at a first rate based at least inpart on duration a display duration of the first image is less than aduration threshold; adjusting the counter value at a second ratedifferent from the first rate based at least in part on duration thedisplay duration of the first image is not less than the durationthreshold to facilitate describing the non-linear relationship betweenpixel polarization and duration; and determining the pixel polarizationexpected to be present in the pixel directly before display of thesecond image based at least in part on the counter value directly beforedisplay of the second image.
 15. A computing device comprising: an imagesource configured to output first image data that indicates targetluminance of a pixel in a first image and second image data thatindicates target luminance of the pixel in a second image to bedisplayed after the first image; and an electronic displaycommunicatively coupled to the image source, wherein the electronicdisplay comprises: a driver configured to apply a first voltage signalto the pixel with a first voltage magnitude and a first voltage polaritybased at least in part on the first image data to facilitate displayingthe first image on the electronic display; and a timing controllercommunicatively coupled to the driver, wherein the timing controller isconfigured to: determine a second voltage magnitude and a second voltagepolarity to be applied to the pixel to facilitate display of the secondimage based at least in part on the second image data, the first voltagepolarity of the first voltage signal, a display duration of the firstimage, and a non-linear relationship between pixel polarization andduration; and instruct the driver to apply a second voltage signal tothe pixel with the second voltage magnitude and the second voltagepolarity to facilitate displaying the second image on the electronicdisplay with improved perceived image quality.
 16. The computing deviceof claim 15, wherein, to determine the second voltage polarity, thetiming controller is configured to: determine a value indicative of thepixel polarization present in the pixel directly before display of thesecond image based at least in part on the display duration of the firstimage and the non-linear relationship between pixel polarization andduration; and determine the second voltage polarity based at least inpart on the value to facilitate reducing the pixel polarization presentin the pixel directly before display of the second image duringsubsequent display of one or more image.
 17. The computing device ofclaim 15, comprising a counter communicatively coupled to the timingcontroller, wherein: the counter is configured to: adjust a countervalue at a first rate based at least in part on duration the displayduration of the first image is less than a duration threshold; andadjust the counter value at a second rate different from the first ratebased at least in part on duration the display duration of the firstimage is not less than the duration threshold to facilitate describingthe non-linear relationship between pixel polarization and duration; andthe timing controller is configured to determine the second voltagepolarity based at least in part on the counter value directly beforedisplay of the second image to facilitate reducing pixel polarizationpresent in the pixel during subsequent display of one or more image. 18.The computing device of claim 15, wherein: the image source isconfigured to: output image data while not operating in a sleep mode;and cease outputting image data while operating in the sleep mode; andthe timing controller is configured to determine the second voltagepolarity to be applied to the pixel to facilitate display of the secondimage based at least in part on a sleep duration of the image source andthe non-linear relationship between pixel polarization and duration whenthe image source switches to the sleep mode between display of the firstimage and the second image.
 19. The computing device of claim 18,comprising a timer communicatively coupled to the timing controller,wherein: the timer is configured to start incrementing a timer valuewhen the image source switches into the sleep mode and stop incrementingthe timer value when the image source subsequently switches out of thesleep mode; and the timing controller is configured to determine thesleep duration of the image source based at least in part on the timervalue when the second image data is received.
 20. The computing deviceof claim 18, comprising a counter communicatively coupled to the timingcontroller, wherein: the counter is configured to: adjust a countervalue at a first rate based at least in part on duration the displayduration of the first image is less than a first duration threshold;adjust the counter value at a second rate different from the first ratebased at least in part on duration the display duration of the firstimage is not less than the first duration threshold to facilitatedescribing the non-linear relationship between pixel polarization andduration; and when the image source switches to the sleep mode betweendisplay of the first image and the second image: adjust the countervalue at a third rate based at least in part on duration the sleepduration of the image source is less than a second duration threshold;and adjust the counter value at a fourth rate different from the thirdrate based at least in part on duration the sleep duration of the imagesource is not less than the second duration threshold; and the timingcontroller is configured to determine the second voltage polarity to beapplied to the pixel to facilitate display of the second image based atleast in part on the counter value directly before display of the secondimage to facilitate reducing pixel polarization present in the pixelduring subsequent display of one or more image.